MITSUBISHI Q172DSCPU Common Instruction 1/2 Manual Q172DSCPU Programming Manual

SI/QSI/H-PCF/ broadband H-PCF optical cable.
Double circuit.
Controller network (control station / common station) / remote I/O network (remote master station).
With external power supply function.
MELSECNET/H network module capable of composing large scale flexible network system.
The MELSECNET/H network system includes the PLC network of the control station and the communication between the stations and the remote I/O network in the remote station remote I/O station Q172DSCPU Common Instruction 1/2 Manual Q172DSCPU Programming Manual Q172DSCPU
Optical fiber loop system...... High speed communication of 10Mbps/25Mbps is realized.
The distance between stations, the length of the total cable length, strong anti-interference.
Coaxial bus system...... Using low cost coaxial cable, the network construction cost is lower than that of the optical fiber loop network Q172DSCPU Common Instruction 1/2 Manual Q172DSCPU Programming Manual.
Twisted pair bus system...... Combined with high performance price ratio network module and twisted pair cable,
The construction cost of network system is very low.8 modules can be installed.
Input / output points: 256 points.
Number of input and output elements: 8192.
Program capacity: 10K step.
Processing speed: 0 Q172DSCPU Common Instruction 1/2 Manual Q172DSCPU Programming Manual. 12 s.
Program memory capacity: 40 KB.
Support USB and RS232.
Unable to install memory card.
Own floor 8 slot.
Ultra high speed processing, production time is shortened, better performance.
As applications become larger and more complex, it is necessary to shorten the system operation cycle time.
The operation period can be shortened by the super high basic operation speed 1.9ns.
In addition to achieve in the past with the control of single-chip high-speed control,
The system performance can be improved by reducing the total scan time,
To prevent any possible performance bias.
High speed and high precision data processing.
The processing speed of the real number (floating point) arithmetic has been greaatly improved,
Addition instruction reached 0 Q172DSCPU Common Instruction 1/2 Manual Q172DSCPU Programming Manual. 014 mu s,
Therefore, it can support the request of high-speed, high-precision processing data processing.
In addition, the new additioon of double precision floating point arithmetic instructions,
Simplify the programming, reduces the computational error when executing complex formula Q172DSCPU Common Instruction 1/2 Manual Q172DSCPU Programming Manual.