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MITSUBISHI L26CPU-BT-CM Structured Text Manual L26CPU-BT-CM Programming Manual

Brand: MITSUBISHI
Product model: L26CPU-BT-CM
Name: PLC
Sort: Programming Manual (Structured Text)
File language: English
File size: 4.20MB
Output points: 16 points.
Rated output voltage: DC24V/AC240V.
Rated open and close current: 2A/1 point.
Common way: 16 point / public end.
Input / output occupied points: 16 points (I/O distribution: output 16 points).
External wiring connection: 18 point terminal.
The switch input and output module is a device which can collect the input / output of the switch signal,
Digital I/O modules are often called L26CPU-BT-CM Structured Text Manual L26CPU-BT-CM Programming Manual L26CPU-BT-CM
The switch signal is collected to the computer or the computer to send the relevant instructions through the RS-485 bus to control the switch of the switch,
Can also be carried out through the RS-485 bus communication,
Remote control switch.
Communication protocol is a standard Modbus protocol or custom protocol L26CPU-BT-CM Structured Text Manual L26CPU-BT-CM Programming Manual. Input and output (DC/ differential).
Input points: 12 points (DC5V/DC24V/ differential universal).
Pulse input speed: the highest pulse/s 8M (2MHz).
Output points: 8 points (DC5V ~ DC24V) 6 points (differential).
Pulse output speed: the highest pulse/s 8M (2MHz).
High speed and stable input / output response
The high speed response can be achieved without the CPU module''s operation and bus performance,
Stable input and output response through hardware processing L26CPU-BT-CM Structured Text Manual L26CPU-BT-CM Programming Manual.
LD40PD01 is equipped with an external input and output interface and FPGA,
Therefore, high speed control can be realized without the influence of the scanning time of the CPU module and the bus performance (the input and output response time of the s instruction is realized).
Can achieve stable input and output response (processing time of the deviation of the ns level).
Through the intuitive tools for FPGA settings.
In the FPGA design process can be omitted in the past must be designed to deal with (HDL description, logic synthesis and time verification),
Reduce working hours. After receiving the product can be used immediately to verify the use of special tools, can significantly shorten the design time. Number of input channels: 2Ch.
Differential drive input.
Maximum count rate: pulse/s 500K.
Linear counter function.
Ring counter function.
Uniform output function.
Preset function.
Count invalid function.
Latch counter function.
Sampling counter function.
Periodic pulse counter function.
Flexibly applied to various applications
Combination of functions,
Easy to achieve speed measurement, long measuring function, the single pulse output, the ratio of the set / distribution output, PWM control, cam switch control, such as a wide range of control.
Single pulse.
To trigger the input as a starting point, with a minimum 25ns unit to adjust the ON/OFF time.
The action time deviation of ON/OFF is ns level, so it can achieve high precision control.
Velocity measurement and length measurement
In addiition to the measurement of ON width and OFF width,
Can also achieve different sensor ON time difference and other conditions of the measurement L26CPU-BT-CM Structured Text Manual L26CPU-BT-CM Programming Manual.
The high precision measurement of the smallest 25ns unit can be realized L26CPU-BT-CM Structured Text Manual L26CPU-BT-CM Programming Manual.
Delayed output
The output time delay of each channel can be adjusted so that the error output can be realized.
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